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<title>Using as: M68K-Moto-Syntax</title>

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<a name="M68K_002dMoto_002dSyntax"></a>
<div class="header">
<p>
Next: <a href="M68K_002dFloat.html#M68K_002dFloat" accesskey="n" rel="next">M68K-Float</a>, Previous: <a href="M68K_002dSyntax.html#M68K_002dSyntax" accesskey="p" rel="prev">M68K-Syntax</a>, Up: <a href="M68K_002dDependent.html#M68K_002dDependent" accesskey="u" rel="up">M68K-Dependent</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>
</div>
<hr>
<a name="Motorola-Syntax"></a>
<h4 class="subsection">9.23.3 Motorola Syntax</h4>

<a name="index-Motorola-syntax-for-the-680x0"></a>
<a name="index-alternate-syntax-for-the-680x0"></a>

<p>The standard Motorola syntax for this chip differs from the syntax
already discussed (see <a href="M68K_002dSyntax.html#M68K_002dSyntax">Syntax</a>).  <code>as</code> can
accept Motorola syntax for operands, even if <small>MIT</small> syntax is used for
other operands in the same instruction.  The two kinds of syntax are
fully compatible.
</p>
<p>In the following table <var>apc</var> stands for any of the address registers
(&lsquo;<samp>%a0</samp>&rsquo; through &lsquo;<samp>%a7</samp>&rsquo;), the program counter (&lsquo;<samp>%pc</samp>&rsquo;), the
zero-address relative to the program counter (&lsquo;<samp>%zpc</samp>&rsquo;), or a
suppressed address register (&lsquo;<samp>%za0</samp>&rsquo; through &lsquo;<samp>%za7</samp>&rsquo;).  The use
of <var>size</var> means one of &lsquo;<samp>w</samp>&rsquo; or &lsquo;<samp>l</samp>&rsquo;, and it may always be
omitted along with the leading dot.  The use of <var>scale</var> means one of
&lsquo;<samp>1</samp>&rsquo;, &lsquo;<samp>2</samp>&rsquo;, &lsquo;<samp>4</samp>&rsquo;, or &lsquo;<samp>8</samp>&rsquo;, and it may always be omitted
along with the leading asterisk.
</p>
<p>The following additional addressing modes are understood:
</p>
<dl compact="compact">
<dt><em>Address Register Indirect</em></dt>
<dd><p>&lsquo;<samp>(%a0)</samp>&rsquo; through &lsquo;<samp>(%a7)</samp>&rsquo;<br>
&lsquo;<samp>%a7</samp>&rsquo; is also known as &lsquo;<samp>%sp</samp>&rsquo;, i.e., the Stack Pointer.  <code>%a6</code>
is also known as &lsquo;<samp>%fp</samp>&rsquo;, the Frame Pointer.
</p>
</dd>
<dt><em>Address Register Postincrement</em></dt>
<dd><p>&lsquo;<samp>(%a0)+</samp>&rsquo; through &lsquo;<samp>(%a7)+</samp>&rsquo;
</p>
</dd>
<dt><em>Address Register Predecrement</em></dt>
<dd><p>&lsquo;<samp>-(%a0)</samp>&rsquo; through &lsquo;<samp>-(%a7)</samp>&rsquo;
</p>
</dd>
<dt><em>Indirect Plus Offset</em></dt>
<dd><p>&lsquo;<samp><var>number</var>(<var>%a0</var>)</samp>&rsquo; through &lsquo;<samp><var>number</var>(<var>%a7</var>)</samp>&rsquo;,
or &lsquo;<samp><var>number</var>(<var>%pc</var>)</samp>&rsquo;.
</p>
<p>The <var>number</var> may also appear within the parentheses, as in
&lsquo;<samp>(<var>number</var>,<var>%a0</var>)</samp>&rsquo;.  When used with the <var>pc</var>, the
<var>number</var> may be omitted (with an address register, omitting the
<var>number</var> produces Address Register Indirect mode).
</p>
</dd>
<dt><em>Index</em></dt>
<dd><p>&lsquo;<samp><var>number</var>(<var>apc</var>,<var>register</var>.<var>size</var>*<var>scale</var>)</samp>&rsquo;
</p>
<p>The <var>number</var> may be omitted, or it may appear within the
parentheses.  The <var>apc</var> may be omitted.  The <var>register</var> and the
<var>apc</var> may appear in either order.  If both <var>apc</var> and
<var>register</var> are address registers, and the <var>size</var> and <var>scale</var>
are omitted, then the first register is taken as the base register, and
the second as the index register.
</p>
</dd>
<dt><em>Postindex</em></dt>
<dd><p>&lsquo;<samp>([<var>number</var>,<var>apc</var>],<var>register</var>.<var>size</var>*<var>scale</var>,<var>onumber</var>)</samp>&rsquo;
</p>
<p>The <var>onumber</var>, or the <var>register</var>, or both, may be omitted.
Either the <var>number</var> or the <var>apc</var> may be omitted, but not both.
</p>
</dd>
<dt><em>Preindex</em></dt>
<dd><p>&lsquo;<samp>([<var>number</var>,<var>apc</var>,<var>register</var>.<var>size</var>*<var>scale</var>],<var>onumber</var>)</samp>&rsquo;
</p>
<p>The <var>number</var>, or the <var>apc</var>, or the <var>register</var>, or any two of
them, may be omitted.  The <var>onumber</var> may be omitted.  The
<var>register</var> and the <var>apc</var> may appear in either order.  If both
<var>apc</var> and <var>register</var> are address registers, and the <var>size</var>
and <var>scale</var> are omitted, then the first register is taken as the
base register, and the second as the index register.
</p></dd>
</dl>

<hr>
<div class="header">
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Next: <a href="M68K_002dFloat.html#M68K_002dFloat" accesskey="n" rel="next">M68K-Float</a>, Previous: <a href="M68K_002dSyntax.html#M68K_002dSyntax" accesskey="p" rel="prev">M68K-Syntax</a>, Up: <a href="M68K_002dDependent.html#M68K_002dDependent" accesskey="u" rel="up">M68K-Dependent</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>
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